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Please use this identifier to cite or link to this item: http://hdl.handle.net/1942/25376

Title: High-Quality View Interpolation Based on Depth Maps and Its Hardware Implementation
Authors: Li, Yanzhe
Huang, Kai
Claesen, Luc
Issue Date: 2017
Publisher: IEEE Institute of Electrical and Electronics Engineers
Citation: Proceedings of the 27th International Conference on Field-Programmable Logic and Applications, FPL-2017, IEEE Institute of Electrical and Electronics Engineers,p. 5B-1-5B-6
Abstract: Three dimensional (3D) vision applications have drawn more attention nowadays and many products are entering the mass market. View interpolation is a crucial step to generate intermediate viewpoints from reference images. However, it is still challenging to achieve good performance in both processing speed and image quality for various 3D applications. In this paper, a hardware-compatible view interpolation algorithm is proposed, which can produce high-quality intermediate images by disparity warping and color blending. Moreover, a fully pipelined hardware architecture is designed based on the algorithm. A prototype of the proposed architecture has been implemented on an Altera Stratix-IV FPGA board, achieving 65 frames per second (fps) with a full HD (1920 1080) resolution. It is evaluated on the Middlebury benchmark quantitatively, and visual results of realworld images are also provided.
URI: http://hdl.handle.net/1942/25376
DOI: 10.23919/FPL.2017.8056787
ISBN: 9789090304281
ISSN: 1946-1488
Category: C1
Type: Proceedings Paper
Appears in Collections: Research publications

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