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Please use this identifier to cite or link to this item: http://hdl.handle.net/1942/23502

Title: SoC Processor for Real-Time Object Labeling in Life Camera Streams with Low Line Level Latency
Authors: Yu, Zhengqiang
Claesen, Luc
Pan, Yun
Motten, Andy
Wang, Yimu
Yan, Xiaolang
Issue Date: 2014
Publisher: IEEE
Citation: Proceedings of the IEEE International Symposium on Circuits and Systems 2014, IEEE,p. 345-348
Abstract: Image recognition systems implement a number of processing stages: preprocessing, segmentation and classification. In camera based video processing chains, usually several frame delays are incurred between the moment of capture and the actual availability of the classification results. Hardware architectures for stream based video processing have already been widely employed. In this paper, a new hardware architecture for accelerating the generic task of connected component analysis and object labeling in the segmentation step is presented. The architecture is specifically optimized for very low latency between image component capture by a camera and the detection in hardware. This latency constitutes only a few delay lines, thereby shortening the response time by a few orders of magnitude in comparison to traditional frame-buffer based methods.
URI: http://hdl.handle.net/1942/23502
DOI: 10.1109/ISCAS.2014.6865136
ISBN: 9781479934324
Category: C1
Type: Proceedings Paper
Appears in Collections: Research publications

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