Document Server@UHasselt >
Research >
Research publications >

Please use this identifier to cite or link to this item: http://hdl.handle.net/1942/22825

Title: SoC and FPGA Oriented High-quality Stereo Vision System
Authors: Li, Yanzhe
Huang, Kai
Claesen, Luc
Issue Date: 2016
Publisher: IEEE Xplore
Citation: 2016 26th International Conference on Field Programmable Logic and Applications (FPL 2016), IEEE,p. 439-442
Series/Report: 2016 26th International Conference on Field Programmable Logic and Applications (FPL 2016)
Abstract: Stereo matching is a crucial step for acquiring depth information from stereo images. However, it is still challenging to achieve good performance in both speed and accuracy for various stereo vision applications. In this paper, a hardware-compatible stereo matching algorithm is proposed; its associated hardware implementation is also presented. The proposed algorithm can produce high-quality disparity maps with the use of mini-census transform, segmentation-based adaptive support weight and effective refinement. Moreover, the proposed implementation is optimized as a fully pipelined and scalable hardware system. The proposed design is evaluated based on the Middlebury benchmarks and the average overall error rate is 6.10%. The experimental results indicate that the accuracy is competitive with some state-of-art software implementations.
Notes: [Li, Yanzhe; Huang, Kai] Zhejiang Univ, Inst VLSI Design, Hangzhou, Zhejiang, Peoples R China. [Claesen, Luc] Hasselt Univ, Engn Technol Elect ICT Dept, B-3590 Diepenbeek, Belgium.
URI: http://hdl.handle.net/1942/22825
DOI: 10.1109/FPL.2016.7577366
ISI #: 000386610400068
ISBN: 9781509008513
ISSN: 1946-147X
Category: C1
Type: Proceedings Paper
Validation: ecoom, 2017
Appears in Collections: Research publications

Files in This Item:

Description SizeFormat
Published version1.65 MBAdobe PDF

Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.