Document Server@UHasselt >
Research publications >
Please use this identifier to cite or link to this item:
|Title: ||Low-Cost Real-Time Stereo Vision Hardware with Binary Confidence Metric and Disparity Refinement|
|Authors: ||Motten, Andy|
|Issue Date: ||2011|
|Citation: ||Proceedings of the International Conference on Multimedia Technology ICMT, p. 3559-3562|
|Abstract: ||This paper presents a real-time stereo vision System-on-Chip (SoC) architecture for a depth-field generation processor as required in 3D TV applications. This architecture includes post-processing steps like a decision tree based confidence metric and a disparity refinement module while still fitting in a low cost FPGA. A real-time stereo matching calculation at a frame rate of 56 Hz with a resolution of 800 × 600 and a disparity of 80 has been realized using this architecture without the need for external memories.|
|Type: ||Proceedings Paper|
|Appears in Collections: ||Research publications|
Files in This Item:
There are no files associated with this item.
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.